| Reverse Engineering Digital Circuits Using Structural and Functional Analyses. P Subramanyan, N Tsiskaridze, W Li, A Gascón, WY Tan, A Tiwari, ... IEEE Trans. Emerging Topics Comput. 2 (1), 63-80, 2014 | 172 | 2014 |
| Reverse engineering digital circuits using functional analysis P Subramanyan, N Tsiskaridze, K Pasricha, D Reisman, A Susnea, ... Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 …, 2013 | 117 | 2013 |
| An efficient SMT solver for string constraints T Liang, A Reynolds, N Tsiskaridze, C Tinelli, C Barrett, M Deters Formal Methods in System Design 48, 206-234, 2016 | 71 | 2016 |
| All-SAT using minimal blocking clauses Y Yu, P Subramanyan, N Tsiskaridze, S Malik 2014 27th International Conference on VLSI Design and 2014 13th …, 2014 | 58 | 2014 |
| Conflict Resolution K Korovin, N Tsiskaridze, A Voronkov Principles and Practice of Constraint Programming-CP 2009, 509-523, 2009 | 57 | 2009 |
| A decision procedure for regular membership and length constraints over unbounded strings T Liang, N Tsiskaridze, A Reynolds, C Tinelli, C Barrett Frontiers of Combining Systems: 10th International Symposium, FroCoS 2015 …, 2015 | 48 | 2015 |
| A Computational Temporal Logic for Superconducting Accelerators G Tzimpragos, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ... Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 46 | 2020 |
| Creating an Agile Hardware Design Flow R Bahr, C Barrett, N Bhagdikar, A Carsello, R Daly, C Donovick, D Durst, ... 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 32 | 2020 |
| Constraint normalization and parameterized caching for quantitative program analysis T Brennan, N Tsiskaridze, N Rosner, A Aydin, T Bultan Proceedings of the 2017 11th Joint Meeting on Foundations of Software …, 2017 | 28 | 2017 |
| AHA: An Agile Approach to the Design of Coarse-Grained Reconfigurable Accelerators and Compilers K Koul, J Melchert, K Sreedhar, L Truong, G Nyengele, K Zhang, Q Liu, ... ACM Transactions on Embedded Computing Systems (TECS), 0 | 22 | |
| Temporal computing with superconductors G Tzimpragos, J Volk, D Vasudevan, N Tsiskaridze, G Michelogiannakis, ... IEEE Micro 41 (3), 71-79, 2021 | 17 | 2021 |
| Efficient solving of string constraints for security analysis C Barrett, C Tinelli, M Deters, T Liang, A Reynolds, N Tsiskaridze Proceedings of the Symposium and Bootcamp on the Science of Security, 4-6, 2016 | 6 | 2016 |
| Implementing conflict resolution K Korovin, N Tsiskaridze, A Voronkov International Andrei Ershov Memorial Conference on Perspectives of System …, 2011 | 6 | 2011 |
| Automating System Configuration N Tsiskaridze, M Strange, M Mann, K Sreedhar, Q Liu, M Horowitz, ... CONFERENCE ON FORMAL METHODS IN COMPUTER-AIDED DESIGN–FMCAD 2021, 102, 2021 | 4 | 2021 |
| Information leakage in arbiter protocols N Tsiskaridze, L Bang, J McMahan, T Bultan, T Sherwood Automated Technology for Verification and Analysis: 16th International …, 2018 | 2 | 2018 |
| Language Support for Navigating Architecture Design in Closed Form W Cui, G Tzimpragos, Y Tao, J Mcmahan, D Dangwal, N Tsiskaridze, ... ACM Journal on Emerging Technologies in Computing Systems (JETC) 16 (1), 1-28, 2019 | 1 | 2019 |
| From arbitrary functions to space-time implementations G Tzimpragos, N Tsiskaridze, K Huch, A Madhavan, T Sherwood Proceedings of the 1st Unary Computing Workshop (ISCA’19), 2019 | 1 | 2019 |
| Leveraging the Power of Automated Reasoning in Security Analysis of Web Applications and Beyond N Tsiskaridze | | 2017 |
| Conflict Resolution N Tsiskaridze University of Manchester, 2011 | | 2011 |
| 2 Special Issue on Emerging Nanoscale Architectures for Hardware Security, Trust, and Reliability: Part 1 by R. Karri and M. Potkonjak 4 On-Chip Nanoscale Capacitor Decoupling … M Mayhew, R Muresan, J Kong, F Koushanfar, L Bossuet, XT Ngo, ... | | |
