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Andrea DomeniciUniversity of PisaVerified email at iet.unipi.it
Paolo MasciPrincipal Engineer, National Institute of Aerospace, Langley Research Center, Hampton, VAVerified email at nianet.org
A. FantechiUniversità di FirenzeVerified email at unifi.it
Maurizio PalmieriUniversity of PisaVerified email at ing.unipi.it
Stefania GnesiISTI-CNR, ItalyVerified email at isti.cnr.it
Luca SimonciniProfessor of Computer Engineering, University of PisaVerified email at isti.cnr.it
Giuseppe LettieriAssociate Professor of Computer Engineering, Università di PisaVerified email at unipi.it
Marco AvvenutiDip. Ingegneria dell'Informazione, University of Pisa, ItalyVerified email at iet.unipi.it
Luca SterponePolitecnico di TorinoVerified email at polito.it
andrea bondavalliProfessor of computer science, University of FirenzeVerified email at unifi.it
Antonella SantoneVerified email at unisannio.it
GIANLUCA DINIDept. of Ingegneria di Informazione, University of PisaVerified email at unipi.it
Adriano FagioliniAssistant Professor, University of PalermoVerified email at unipa.it
Mario Giovanni Cosimo Antonio CiminoAssociate Professor, Department of Information EngineeringVerified email at unipi.it
Federico BarontiUniversity of PisaVerified email at iet.unipi.it
Roberto SalettiUniversity of PisaVerified email at iet.unipi.it
Marco Di NataleFull Professor, TECIP Institute, Scuola Superiore S. AnnaVerified email at sssup.it
gigliola vagliniProfessore di Ingegneria informatica, Università di pisaVerified email at iet.unipi.it
Harold ThimblebyProfessor of Computer Science, Swansea UniversityVerified email at swansea.ac.uk
Gioacchino MauroVerified email at studenti.unipi.it

cinzia bernardeschi

Department of Information Engineering, University of Pisa

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Formal methods dependable systems safety security


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A formal verification environment for railway signaling system design C Bernardeschi, A Fantechi, S Gnesi, S Larosa, G Mongardi, D Romano Formal Methods in System Design 12, 139-161, 1998	87	1998
Model checking fault tolerant systems C Bernardeschi, A Fantechi, S Gnesi Software testing, verification and reliability 12 (4), 251-275, 2002	64	2002
Design and safety verification of a distributed charge equalizer for modular li-ion batteries F Baronti, C Bernardeschi, L Cassano, A Domenici, R Roncella, R Saletti IEEE Transactions on Industrial Informatics 10 (2), 1003-1011, 2014	57	2014
Java bytecode verification for secure information flow M Avvenuti, C Bernardeschi, N De Francesco ACM SIGPLAN Notices 38 (12), 20-27, 2003	48	2003
A PVS-simulink integrated environment for model-based analysis of cyber-physical systems C Bernardeschi, A Domenici, P Masci IEEE Transactions on Software Engineering 44 (6), 512-533, 2017	46	2017
SRAM-based FPGA systems for safety-critical applications: A survey on design standards and proposed methodologies C Bernardeschi, L Cassano, A Domenici Journal of Computer Science and Technology 30 (2), 373, 2015	43	2015
Checking security of java bytecode by abstract interpretation R Barbuti, C Bernardeschi, N De Francesco Proceedings of the 2002 ACM symposium on Applied computing, 229-236, 2002	39	2002
Formally verifying fault tolerant system designs C Bernardeschi, A Fantechi, L Simoncini The Computer Journal 43 (3), 191-205, 2000	38	2000
Accurate simulation of SEUs in the configuration memory of SRAM-based FPGAs C Bernardeschi, L Cassano, A Domenici, L Sterpone 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2012	37	2012
Combining abstract interpretation and model checking for analysing security properties of Java bytecode C Bernardeschi, N De Francesco Verification, Model Checking, and Abstract Interpretation: Third …, 2002	36	2002
Abstract interpretation of operational semantics for secure information flow R Barbuti, C Bernardeschi, N De Francesco Information Processing Letters 83 (2), 101-108, 2002	28	2002
Transformations and consistent semantics for ODP viewpoints C Bernardeschi, J Dustzadeh, A Fantechi, E Najm, A Nimour, F Olsen Formal Methods for Open Object-based Distributed Systems: Volume 2, 371-386, 1997	27	1997
ASSESS: A simulator of soft errors in the configuration memory of SRAM-based FPGAs C Bernardeschi, L Cassano, A Domenici, L Sterpone IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014	26	2014
Checking secure information flow in java bytecode by code transformation and standard bytecode verification C Bernardeschi, N De Francesco, G Lettieri, L Martini Software: Practice and Experience 34 (13), 1225-1255, 2004	26	2004
Early prototyping of wireless sensor network algorithms in PVS C Bernardeschi, P Masci, H Pfeifer Computer Safety, Reliability, and Security: 27th International Conference …, 2008	25	2008
Co-simulation of semi-autonomous systems: The line follower robot case study M Palmieri, C Bernardeschi, P Masci Software Engineering and Formal Methods: SEFM 2017 Collocated Workshops …, 2018	24	2018
Extending a user interface prototyping tool with automatic MISRA C code generation G Mauro, H Thimbleby, A Domenici, C Bernardeschi arXiv preprint arXiv:1701.08468, 2017	23	2017
Failure probability of SRAM-FPGA systems with stochastic activity networks C Bernardeschi, L Cassano, A Domenici 14th IEEE International Symposium on Design and Diagnostics of Electronic …, 2011	22	2011
Analysis of wireless sensor network protocols in dynamic scenarios C Bernardeschi, P Masci, H Pfeifer Stabilization, Safety, and Security of Distributed Systems: 11th …, 2009	22	2009
Combining PVSio with stateflow P Masci, Y Zhang, P Jones, P Oladimeji, E D’Urso, C Bernardeschi, ... NASA Formal Methods: 6th International Symposium, NFM 2014, Houston, TX, USA …, 2014	21	2014

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