| The worst-case execution-time problem—overview of methods and survey of tools R Wilhelm, J Engblom, A Ermedahl, N Holsti, S Thesing, D Whalley, ... ACM Transactions on Embedded Computing Systems (TECS) 7 (3), 1-53, 2008 | 2700 | 2008 |
| A survey of cache coherence schemes for multiprocessors P Stenstrom Computer 23 (6), 12-24, 1990 | 614 | 1990 |
| Timing anomalies in dynamically scheduled microprocessors T Lundqvist, P Stenstrom Proceedings 20th IEEE Real-Time Systems Symposium (Cat. No. 99CB37054), 12-21, 1999 | 525 | 1999 |
| A robust main-memory compression scheme M Ekman, P Stenstrom 32nd International Symposium on Computer Architecture (ISCA'05), 74-85, 2005 | 268 | 2005 |
| An adaptive cache coherence protocol optimized for migratory sharing P Stenström, M Brorsson, L Sandberg ACM SIGARCH Computer Architecture News 21 (2), 109-118, 1993 | 245 | 1993 |
| Comparative performance evaluation of cache-coherent NUMA and COMA architectures P Stenström, T Joe, A Gupta Proceedings of the 19th annual international symposium on Computer …, 1992 | 245 | 1992 |
| Sequential hardware prefetching in shared-memory multiprocessors F Dahlgren, M Dubois, P Stenstrom IEEE Transactions on Parallel and Distributed Systems 6 (7), 733-746, 1995 | 232 | 1995 |
| An integrated path and timing analysis method based on cycle-level symbolic execution T Lundqvist, P Stenström Real-Time Systems 17, 183-207, 1999 | 225 | 1999 |
| SimICS/Sun4m: A Virtual Workstation. PS Magnusson, F Larsson, A Moestedt, B Werner, J Nilsson, P Stenström, ... Usenix Annual Technical Conference, 119-130, 1998 | 217 | 1998 |
| Fixed and adaptive sequential prefetching in shared memory multiprocessors F Dahlgren, M Dubois, P Stenstrom 1993 International Conference on Parallel Processing-ICPP'93 1, 56-63, 1993 | 214 | 1993 |
| An adaptive shared/private nuca cache partitioning scheme for chip multiprocessors H Dybdahl, P Stenstrom 2007 IEEE 13th International Symposium on High Performance Computer …, 2007 | 196 | 2007 |
| Recency-based TLB preloading A Saulsbury, F Dahlgren, P Stenström Proceedings of the 27th annual international symposium on Computer …, 2000 | 180 | 2000 |
| A prefetching technique for irregular accesses to linked data structures M Karlsson, F Dahlgren, P Stenstrom Proceedings Sixth International Symposium on High-Performance Computer …, 2000 | 163 | 2000 |
| The detection and elimination of useless misses in multiprocessors M Dubois, J Skeppstedt, L Ricciulli, K Ramamurthy, P Stenström ACM SIGARCH Computer Architecture News 21 (2), 88-97, 1993 | 155 | 1993 |
| SC2: a statistical compression cache scheme A Arelakis, P Stenstrom Proceeding of the 41st annual international symposium on Computer …, 2014 | 147 | 2014 |
| TLB and snoop energy-reduction using virtual caches in low-power chip-multiprocessors M Ekman, P Stenström, F Dahlgren Proceedings of the 2002 international symposium on Low power electronics and …, 2002 | 122 | 2002 |
| The cachemire test bench-a flexible and effective approach for simulation of multiprocessors M Brorsson, F Dahlgren, H Nilsson, P Stenström Annual Simulation Symposium 26, 41-41, 1993 | 121 | 1993 |
| Parallel computer organization and design M Dubois, M Annavaram, P Stenström cambridge university press, 2012 | 118 | 2012 |
| Integrating path and timing analysis using instruction-level simulation techniques T Lundqvist, P Stenström Languages, Compilers, and Tools for Embedded Systems, 1-15, 1998 | 110 | 1998 |
| Evaluation of hardware-based stride and sequential prefetching in shared-memory multiprocessors F Dahlgren, P Stenstrom IEEE Transactions on Parallel and Distributed Systems 7 (4), 385-398, 1996 | 108 | 1996 |
