| The high-level synthesis of digital systems MC McFarland, AC Parker, R Camposano Proceedings of the IEEE 78 (2), 301-318, 1990 | 928 | 1990 |
| Sehwa: A software package for synthesis of pipelines from behavioral specifications N Park, AC Parker IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 538 | 2002 |
| MAHA: A program for datapath synthesis AC Parker, J Pizarro, M Mlinar 23rd ACM/IEEE Design Automation Conference, 461-466, 1986 | 479 | 1986 |
| Tutorial on high-level synthesis MC McFarland, AC Parker, R Camposano DAC, 330-336, 1988 | 457 | 1988 |
| REAL: A program for register allocation FJ Kurdahi, AC Parker Proceedings of the 24th ACM/IEEE Design Automation Conference, 210-215, 1987 | 453 | 1987 |
| A representation for shape based on peaks and ridges in the difference of low-pass transform JL Crowley, AC Parker IEEE transactions on pattern analysis and machine intelligence, 156-170, 1984 | 431 | 1984 |
| SOS: Synthesis of application-specific heterogeneous multiprocessor systems S Prakash, AC Parker Journal of Parallel and Distributed computing 16 (4), 338-351, 1992 | 322 | 1992 |
| Biological underpinnings for lifelong learning machines D Kudithipudi, M Aguilar-Simon, J Babb, M Bazhenov, D Blackiston, ... Nature Machine Intelligence 4 (3), 196-210, 2022 | 228 | 2022 |
| A formal method for the specification, analysis, and design of register-transferlevel digital logic L Hafer, AC Parker Papers on Twenty-five years of electronic design automation, 546-553, 1988 | 220 | 1988 |
| A design methodology and computer aids for digital VLSI systems S Director, A Parker, D Siewiorek, D Thomas IEEE Transactions on Circuits and Systems 28 (7), 634-645, 1981 | 163 | 1981 |
| Techniques for area estimation of VLSI layouts FJ Kurdahi, AC Parker IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1989 | 151 | 1989 |
| 3D scheduling: High-level synthesis with floorplanning JP Weng, AC Parker Proceedings of the 28th ACM/IEEE Design Automation Conference, 668-673, 1991 | 140 | 1991 |
| Sehwa: A program for synthesis of pipelines N Park, A Parker Papers on Twenty-five years of electronic design automation, 595-601, 1988 | 118 | 1988 |
| The ADAM advanced design automation system: Overview, planner and natural language interface J Granacki, D Knapp, A Parker 22nd ACM/IEEE Design Automation Conference, 727-730, 1985 | 115 | 1985 |
| A memristor SPICE model for designing memristor circuits M Mahvash, AC Parker 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 989-992, 2010 | 113 | 2010 |
| Predicting system-level area and delay for pipelined and nonpipelined designs R Jain, AC Parker, N Park IEEE transactions on computer-aided design of integrated circuits and …, 1992 | 104 | 1992 |
| Accuracy sensitive word-length selection for algorithm optimization SA Wadekar, AC Parker Proceedings International Conference on Computer Design. VLSI in Computers …, 1998 | 102 | 1998 |
| Stochastic models for wireability analysis of gate arrays S Sastry, AC Parker IEEE transactions on computer-aided design of integrated circuits and …, 1986 | 98 | 1986 |
| Automated synthesis of digital hardware Hafer, Parker IEEE Transactions on Computers 100 (2), 93-109, 1982 | 95 | 1982 |
| CHOP: A constraint-driven system-level partitioner K Kükçakar, AC Parker Proceedings of the 28th ACM/IEEE Design Automation Conference, 514-519, 1991 | 92 | 1991 |
Chih-Chieh HsuPh.D., Electrical Engineering, University of Southern CaliforniaVerified email at usc.edu
